20,000 LKR

FPGA System Design & Optimization using VHDL/ Verilog

This Program is Conducting By

SCION Engineering

Member Since: 9 months
759452696

Offer Type

certificate-courses

Medium

English

Method

Full time

Duration

8 weeks

Location

Colombo

Commencement

Pending

Description

Currently Not Available

Course duration – 8 weeks, 4 hour session per week

Course is conducted by qualified University Lecturer.

Fee structure 
Group class (3 – 6 students) – Rs. 20,000 per one student

Fees can be paid in two installments.

Lecture notes and take home assignments / tutorials will be given for every session.

Individual attention is guaranteed.

Wi-Fi and Library facilities are available.

Air Conditioned Lecture Rooms.

For more details please contact us.

Details

Last Updated On:March 13th, 2022 at 12:47 am
Price: 20,000 LKR
Currency Type:LKR (LKR)
Medium:English
Method:Full time
Commencement:Pending
Duration:8 weeks
Location: Colombo

Features

  • Job Banking
  • Labs
  • Library
  • LMS
  • Medical Facilities
  • Parking
  • Recreation Area
  • Relaxation Area
  • Student Center
  • Study Area
  • Wi-Fi

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